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Enhanced Floating Hot Deck Low-Voltage Power Supplies with Isolated Digital and Analog I/O
The EFL series of floating hot deck, low-voltage (LV) power supplies offers an integrated solution for systems requiring LV power and controls with high voltage isolation. Combining a highly isolated, DC-to-DC multi-output low-voltage power supply (LVPS) with an advanced isolated digital and analog I/O topology, the EFL subsystem provides both power and controls to floating-hot-deck circuitry. This solution, when combined with one or more UltraVolt HVPS or other circuitry, can provide high-performance solutions for a variety of applications.
Model-Specific Downloads
EFL series brochure JAPANESE
EFL series data packet
Using the 15EFL isolated power supply
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Typical Applications |
Features |
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Floating/stacked ion or e-beam biases
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Floating filament bias
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Floating gulsers and gated grids
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Floating capacitance meters
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Floating high side current monitors
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Floating leakage testers
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Precision analog control
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Linearity of ±0.05% and accuracy of ±0.2%
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10ppm temperature coefficient
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Isolated up to 15 kV or 30kV
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Isolation resistance of 150 GΩ (15 kV) or 2 GΩ (30 kV)
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4 regulated floating LV power outputs
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Isolated digital and analog I/O to and from floating hot deck
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Local controls: reference
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Parameter |
Conditions |
Models |
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Input power |
12 W |
24 W |
36 W (15 kV only) |
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Voltage range (VDC) |
Full power |
+12 ±5% |
+24 ±10% |
+24 ±10% |
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Current (mA) |
Standby (disabled) |
< 150 |
< 100 |
< 100 |
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Current (A) |
No load |
< 0.50 |
< 0.50 |
< 0.50 |
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Current (A) |
Max load |
< 2.50 |
< 2.30 |
< 3.00 |
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AC ripple current (mA pk to pk) |
Nominal input, full load |
< 50 |
< 50 |
< 50 |
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Output impedance (Ω) |
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T = +25°C |
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Stability (mV/°C) |
Over full temperature range |
0.4 |
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Local controls: reference |
All Types |
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Output voltage (VDC) |
T = +25°C, initial value |
+5.1 ±2% |
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Output impedance (Ω) |
T = +25°C |
464 ±1% |
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Stability (mV/°C) |
Over full temperature range |
0.4 |
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Local controls: LVPS enable/disable |
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All Types |
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Power supply on |
Open, or a voltage above TTL High (Isource < 400μA) |
+3.2 to 5 |
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Power supply off |
Grounded, or a voltage below TTL low |
< 0.8 (Isink 1 mA min) |
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Input/output isolation |
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15 EFL |
30 EFL |
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Isolation voltage (kV) |
Continuous |
150 |
30 |
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Isolation resistance (GΩ) |
All inputs to all outputs |
150 |
2 |
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Leakage capacitance (pF) |
All inputs to all outputs |
< 40 std, < 50 "-E" |
< 40 std |
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Isolated power outputs |
12 W |
24 W |
36 W (15 kV only) |
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Output #1 power (W) |
Nominal input, max Eout |
12 |
24 |
36 |
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Output #1 voltage (VDC) |
Nominal input voltage range |
+12 ±2% |
+24 ±2% |
+24 ±2% |
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Output #1 current (A) |
Min to max |
0 to 1 |
0 to 1 |
0 to 1.5 |
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Output #1 line regulation (VDC) |
Nominal input range, full load |
< 0.1% |
< 0.1% |
<0.1% |
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Output #1 load regulation (VDC) |
No load to full load |
< 0.25% |
< 0.30% |
<0.40% |
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Output #1 ripple (V pk to pk) |
Full load |
< 2.5% |
< 1.5% |
< 1.5% |
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Output #2 and #4 voltage (VDC) |
Nominal input voltage range |
±15 ±5% |
±15 ±5% |
±15 ±5% |
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Output #2 and #4 current (mA) |
Min to max |
0 to 50 |
0 to 50 |
0 to 50 |
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Output #2 and #4 line regulation (VDC) |
Nominal input range, full load |
< 0.3% |
< 0.3% |
< 0.3% |
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Output #2 and #4 load regulation (VDC) |
No load to full load |
< 5% |
< 1% |
< 1% |
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Output #2 and #4 ripple (V pk to pk) |
Full load |
< 2.5% |
< 2.5% |
< 2.5% |
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Output #3 voltage (VDC) |
Nominal input voltage range |
+5.1±1% |
+5.1±1% |
+5.1±1% |
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Output #3 current (mA) |
Min to max |
500 |
500 |
500 |
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Output #3 line regulation (VDC) |
Nominal input range, full load |
< 1% |
< 1% |
< 1% |
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Output #3 load regulation (VDC) |
No load to full load |
< 1% |
< 1% |
< 1% |
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Output #3 ripple (V pk to pk) |
Full load |
< 4% |
< 4% |
4 % |
Isolated controls: TTL channel "up"
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Conditions |
All Types |
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Local input |
Source voltage, sink current |
0 ≤ 0.5 (Isink 3 mA min)
1 ≥ 2.4 (300 μA max or open collector) (VDC) |
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Isolated output (VDC) |
Inverted and buffered TTL |
1 ≥ 2.4, 0 ≤ 0.55 ± (sources 0.8 mA, sinks 3 mA) |
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Baud rate (ms) |
Duty cycle |
< 15 |
Isolated controls: analog "Up"
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Conditions |
12 V |
24 V |
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Local input voltage (VDC) |
Range |
0 to +5 |
0 to +10 |
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Isolated output voltage (VDC) |
Range |
0 to +5 |
0 to +10 |
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Local input impedance (Ω) |
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20.0 K |
0.4 |
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Initial offset error (mV) |
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< ±2 |
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Gain error (VDC) |
Full scale |
< ± 0.2% |
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Linearity error (VDC) |
Full sacle |
< ±0.05% |
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Stability |
30 min warmup, per 8 h, per day |
< ±0.02% |
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Temperature coefficient (ppm/°C) |
0 to +55°C |
< ±10 |
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Bandwidth (Hz) |
Symmetric or asymmetric signal |
DC to 4 |
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Accuracy of specifications in unlocked documents cannot be guaranteed. Please contact your AE representative to confirm specifications.
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